Some optimisations in initialisation of registers
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2a9f876363
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21dfe81d0b
5 changed files with 59 additions and 48 deletions
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@ -292,12 +292,11 @@ typedef struct {
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#define PN53X_SFR_P3 0xFFB0
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#define PN53X_SFR_P3CFGA 0xFFFC
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#define PN53X_SFR_P3CFGB 0xFFFD
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#define PN53X_SFR_P3 0xFFB0
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#define PN53X_SFR_P7CFGA 0xFFF4
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#define PN53X_SFR_P7CFGB 0xFFF5
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#define PN53X_SFR_P7 0xFFF7
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#define PN53X_SFR_P3CFGA 0xFFFC
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#define PN53X_SFR_P3CFGB 0xFFFD
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#define PN53X_SFR_P7CFGA 0xFFF4
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#define PN53X_SFR_P7CFGB 0xFFF5
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#define PN53X_SFR_P7 0xFFF7
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#ifdef DEBUG
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@ -69,10 +69,10 @@ pn53x_init(nfc_device_t * pnd)
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return false;
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}
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// CRC handling is enabled by default
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pnd->bCrc = true;
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// Parity handling is enabled by default
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pnd->bPar = true;
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// CRC handling should be enabled by default as declared in nfc_device_new
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// which is the case by default for pn53x, so nothing to do here
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// Parity handling should be enabled by default as declared in nfc_device_new
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// which is the case by default for pn53x, so nothing to do here
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// We can't read these parameters, so we set a default config by using the SetParameters wrapper
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// Note: pn53x_SetParameters() will save the sent value in pnd->ui8Parameters cache
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@ -512,11 +512,11 @@ pn53x_writeback_register (nfc_device_t * pnd)
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BUFFER_INIT (abtReadRegisterCmd, PN53x_EXTENDED_FRAME__DATA_MAX_LEN);
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BUFFER_APPEND (abtReadRegisterCmd, ReadRegister);
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// First step, it looks for registers to be readed before applying the requested mask
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// First step, it looks for registers to be read before applying the requested mask
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CHIP_DATA (pnd)->wb_trigged = false;
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for (size_t n = 0; n < PN53X_CACHE_REGISTER_SIZE; n++) {
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if ((CHIP_DATA (pnd)->wb_mask[n]) && (CHIP_DATA (pnd)->wb_mask[n] != 0xff)) {
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// This register needs to be readed: mask is present but does not cover full data width (ie. mask != 0xff)
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// This register needs to be read: mask is present but does not cover full data width (ie. mask != 0xff)
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const uint16_t pn53x_register_address = PN53X_CACHE_REGISTER_MIN_ADDRESS + n;
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BUFFER_APPEND (abtReadRegisterCmd, pn53x_register_address >> 8);
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BUFFER_APPEND (abtReadRegisterCmd, pn53x_register_address & 0xff);
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@ -620,10 +620,13 @@ bool
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pn53x_configure (nfc_device_t * pnd, const nfc_device_option_t ndo, const bool bEnable)
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{
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byte_t btValue;
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switch (ndo) {
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case NDO_HANDLE_CRC:
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// Enable or disable automatic receiving/sending of CRC bytes
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if (bEnable == pnd->bCrc) {
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// Nothing to do
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return true;
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}
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// TX and RX are both represented by the symbol 0x80
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btValue = (bEnable) ? 0x80 : 0x00;
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if (!pn53x_write_register (pnd, PN53X_REG_CIU_TxMode, SYMBOL_TX_CRC_ENABLE, btValue))
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@ -635,6 +638,9 @@ pn53x_configure (nfc_device_t * pnd, const nfc_device_option_t ndo, const bool b
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case NDO_HANDLE_PARITY:
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// Handle parity bit by PN53X chip or parse it as data bit
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if (bEnable == pnd->bPar)
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// Nothing to do
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return true;
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btValue = (bEnable) ? 0x00 : SYMBOL_PARITY_DISABLE;
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if (!pn53x_write_register (pnd, PN53X_REG_CIU_ManualRCV, SYMBOL_PARITY_DISABLE, btValue))
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return false;
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@ -691,7 +697,9 @@ pn53x_configure (nfc_device_t * pnd, const nfc_device_option_t ndo, const bool b
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break;
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case NDO_AUTO_ISO14443_4:
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// TODO Cache activated/disactivated options
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if (bEnable == pnd->bAutoIso14443_4)
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// Nothing to do
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return true;
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pnd->bAutoIso14443_4 = bEnable;
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return pn53x_set_parameters (pnd, PARAM_AUTO_RATS, bEnable);
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break;
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