chips/pn53x: *_timed() functions should prefer pn53x_WriteRegister() to bypass any kind of logical handling (mask, writeback, etc)
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9e1230bed7
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e4dfa75045
1 changed files with 8 additions and 16 deletions
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@ -1160,18 +1160,14 @@ pn53x_initiator_transceive_bits_timed (nfc_device_t * pnd, const byte_t * pbtTx,
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// 631a=82 631b=a5 631c=02 631d=00
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// 631a=82 631b=a5 631c=02 631d=00
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// Prepare FIFO
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// Prepare FIFO
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pn53x_write_register (pnd, REG_CIU_COMMAND, 0xFF, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_WriteRegister (pnd, REG_CIU_COMMAND, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_writeback_register(pnd);
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pn53x_WriteRegister (pnd, REG_CIU_FIFOLEVEL, SYMBOL_FLUSH_BUFFER);
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pn53x_write_register (pnd, REG_CIU_FIFOLEVEL, 0xFF, SYMBOL_FLUSH_BUFFER);
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pn53x_writeback_register(pnd);
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for (i=0; i< ((szTxBits / 8) + 1); i++) {
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for (i=0; i< ((szTxBits / 8) + 1); i++) {
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pn53x_write_register (pnd, REG_CIU_FIFODATA, 0xFF, pbtTx[i]);
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pn53x_WriteRegister (pnd, REG_CIU_FIFODATA, pbtTx[i]);
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pn53x_writeback_register(pnd);
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}
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}
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// Send data
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// Send data
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pn53x_write_register (pnd, REG_CIU_BIT_FRAMING, 0xFF, SYMBOL_START_SEND | ((szTxBits % 8) & SYMBOL_TX_LAST_BITS));
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pn53x_WriteRegister (pnd, REG_CIU_BIT_FRAMING, SYMBOL_START_SEND | ((szTxBits % 8) & SYMBOL_TX_LAST_BITS));
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pn53x_writeback_register(pnd);
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// Recv data
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// Recv data
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*pszRxBits = 0;
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*pszRxBits = 0;
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@ -1226,18 +1222,14 @@ pn53x_initiator_transceive_bytes_timed (nfc_device_t * pnd, const byte_t * pbtTx
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// 631a=82 631b=a5 631c=02 631d=00
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// 631a=82 631b=a5 631c=02 631d=00
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// Prepare FIFO
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// Prepare FIFO
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pn53x_write_register (pnd, REG_CIU_COMMAND, 0xFF, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_WriteRegister (pnd, REG_CIU_COMMAND, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_writeback_register(pnd);
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pn53x_WriteRegister (pnd, REG_CIU_FIFOLEVEL, SYMBOL_FLUSH_BUFFER);
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pn53x_write_register (pnd, REG_CIU_FIFOLEVEL, 0xFF, SYMBOL_FLUSH_BUFFER);
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pn53x_writeback_register(pnd);
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for (i=0; i< szTx; i++) {
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for (i=0; i< szTx; i++) {
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pn53x_write_register (pnd, REG_CIU_FIFODATA, 0xFF, pbtTx[i]);
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pn53x_WriteRegister (pnd, REG_CIU_FIFODATA, pbtTx[i]);
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pn53x_writeback_register(pnd);
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}
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}
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// Send data
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// Send data
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pn53x_write_register (pnd, REG_CIU_BIT_FRAMING, 0xFF, SYMBOL_START_SEND);
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pn53x_WriteRegister (pnd, REG_CIU_BIT_FRAMING, SYMBOL_START_SEND);
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pn53x_writeback_register(pnd);
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// Recv data
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// Recv data
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*pszRx = 0;
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*pszRx = 0;
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