pn53x: add timed versions of transceive_bytes/bits
This commit is contained in:
Philippe Teuwen
parent
b21d3c6728
commit
fb398c387f
9 changed files with 299 additions and 9 deletions
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@ -76,6 +76,8 @@ extern "C" {
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NFC_EXPORT bool nfc_initiator_deselect_target (nfc_device_t * pnd);
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NFC_EXPORT bool nfc_initiator_transceive_bytes (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx, size_t * pszRx);
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NFC_EXPORT bool nfc_initiator_transceive_bits (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits, const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar);
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NFC_EXPORT bool nfc_initiator_transceive_bytes_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx, size_t * pszRx, uint16_t * cycles);
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NFC_EXPORT bool nfc_initiator_transceive_bits_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits, const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar, uint16_t * cycles);
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/* NFC target: act as tag (i.e. MIFARE Classic) or NFC target device. */
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NFC_EXPORT bool nfc_target_init (nfc_device_t * pnd, nfc_target_t * pnt, byte_t * pbtRx, size_t * pszRx);
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@ -1138,6 +1138,81 @@ pn53x_initiator_transceive_bits (nfc_device_t * pnd, const byte_t * pbtTx, const
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return true;
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}
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bool
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pn53x_initiator_transceive_bits_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits,
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const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar, uint16_t * cycles)
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{
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unsigned int i;
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uint8_t sz, parity;
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uint16_t prescaler = 0;
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uint16_t reloadval = 0xFFFF;
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uint8_t counter_hi, counter_lo;
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uint16_t counter;
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// We can not just send bytes without parity while the PN53X expects we handled them
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if (!pnd->bPar)
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return false;
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// Sorry, no easy framing support
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// TODO: to be changed once we'll provide easy framing support from libnfc itself...
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if (pnd->bEasyFraming)
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return false;
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// Sorry, no CRC support
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// TODO: to be changed once we'll provide easy CRC support from libnfc itself...
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if (pnd->bCrc)
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return false;
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// Initialize timer
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pn53x_write_register (pnd, REG_CIU_TMODE, 0xFF, SYMBOL_TAUTO | ((prescaler >> 8) & SYMBOL_TPRESCALERHI));
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pn53x_write_register (pnd, REG_CIU_TPRESCALER, 0xFF, (prescaler & SYMBOL_TPRESCALERLO));
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pn53x_write_register (pnd, REG_CIU_TRELOADVALHI, 0xFF, (reloadval >> 8) & 0xFF);
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pn53x_write_register (pnd, REG_CIU_TRELOADVALLO, 0xFF, reloadval & 0xFF);
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// Once timer is started, we cannot use Tama commands anymore.
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// 631a=82 631b=a5 631c=02 631d=00
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// Prepare FIFO
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pn53x_write_register (pnd, REG_CIU_COMMAND, 0xFF, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_write_register (pnd, REG_CIU_FIFOLEVEL, 0xFF, SYMBOL_FLUSH_BUFFER);
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for (i=0; i< ((szTxBits / 8) + 1); i++) {
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pn53x_write_register (pnd, REG_CIU_FIFODATA, 0xFF, pbtTx[i]);
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}
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// Send data
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pn53x_write_register (pnd, REG_CIU_BIT_FRAMING, 0xFF, SYMBOL_START_SEND | ((szTxBits % 8) & SYMBOL_TX_LAST_BITS));
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// Recv data
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pn53x_read_register (pnd, REG_CIU_FIFOLEVEL, &sz);
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*pszRxBits = (sz & SYMBOL_FIFO_LEVEL) * 8;
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for (i=0; i< sz; i++) {
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pn53x_read_register (pnd, REG_CIU_FIFODATA, &(pbtRx[i]));
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}
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// Read timer
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pn53x_read_register (pnd, REG_CIU_TCOUNTERVALHI, &counter_hi);
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pn53x_read_register (pnd, REG_CIU_TCOUNTERVALLO, &counter_lo);
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counter = counter_hi;
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counter = (counter << 8) + counter_lo;
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if (counter == 0) {
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// counter saturated
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*cycles = 0xFFFF;
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} else {
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*cycles = 0xFFFF - counter + 1;
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// Correction, depending on last parity bit sent
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sz = pbtTx[szTxBits / 8];
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parity = (sz >> 7) ^ ((sz >> 6) & 1) ^ ((sz >> 5) & 1) ^ ((sz >> 4) & 1) ^ ((sz >> 3) & 1) ^ ((sz >> 2) & 1) ^ ((sz >> 1) & 1) ^ (sz & 1);
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parity = parity ? 0:1;
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if (parity) {
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*cycles += CHIP_DATA(pnd)->timer_correction_yy;
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} else {
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*cycles += CHIP_DATA(pnd)->timer_correction_zy;
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}
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}
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return true;
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}
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bool
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pn53x_initiator_transceive_bytes (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx,
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size_t * pszRx)
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@ -1182,6 +1257,80 @@ pn53x_initiator_transceive_bytes (nfc_device_t * pnd, const byte_t * pbtTx, cons
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return true;
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}
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bool
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pn53x_initiator_transceive_bytes_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx,
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size_t * pszRx, uint16_t * cycles)
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{
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unsigned int i;
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uint8_t sz, parity;
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uint16_t prescaler = 0;
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uint16_t reloadval = 0xFFFF;
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uint8_t counter_hi, counter_lo;
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uint16_t counter;
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// We can not just send bytes without parity while the PN53X expects we handled them
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if (!pnd->bPar)
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return false;
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// Sorry, no easy framing support
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// TODO: to be changed once we'll provide easy framing support from libnfc itself...
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if (pnd->bEasyFraming)
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return false;
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// Sorry, no CRC support
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// TODO: to be changed once we'll provide easy CRC support from libnfc itself...
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if (pnd->bCrc)
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return false;
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// Initialize timer
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pn53x_write_register (pnd, REG_CIU_TMODE, 0xFF, SYMBOL_TAUTO | ((prescaler >> 8) & SYMBOL_TPRESCALERHI));
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pn53x_write_register (pnd, REG_CIU_TPRESCALER, 0xFF, (prescaler & SYMBOL_TPRESCALERLO));
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pn53x_write_register (pnd, REG_CIU_TRELOADVALHI, 0xFF, (reloadval >> 8) & 0xFF);
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pn53x_write_register (pnd, REG_CIU_TRELOADVALLO, 0xFF, reloadval & 0xFF);
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// Once timer is started, we cannot use Tama commands anymore.
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// E.g. on SCL3711 timer settings are reset by 0x42 InCommunicateThru command to:
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// 631a=82 631b=a5 631c=02 631d=00
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// Prepare FIFO
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pn53x_write_register (pnd, REG_CIU_COMMAND, 0xFF, SYMBOL_COMMAND & SYMBOL_COMMAND_TRANSCEIVE);
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pn53x_write_register (pnd, REG_CIU_FIFOLEVEL, 0xFF, SYMBOL_FLUSH_BUFFER);
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for (i=0; i< szTx; i++) {
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pn53x_write_register (pnd, REG_CIU_FIFODATA, 0xFF, pbtTx[i]);
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}
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// Send data
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pn53x_write_register (pnd, REG_CIU_BIT_FRAMING, 0xFF, SYMBOL_START_SEND);
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// Recv data
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pn53x_read_register (pnd, REG_CIU_FIFOLEVEL, &sz);
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*pszRx = sz & SYMBOL_FIFO_LEVEL;
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for (i=0; i< sz; i++) {
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pn53x_read_register (pnd, REG_CIU_FIFODATA, &(pbtRx[i]));
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}
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// Read timer
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pn53x_read_register (pnd, REG_CIU_TCOUNTERVALHI, &counter_hi);
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pn53x_read_register (pnd, REG_CIU_TCOUNTERVALLO, &counter_lo);
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counter = counter_hi;
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counter = (counter << 8) + counter_lo;
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if (counter == 0) {
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// counter saturated
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*cycles = 0xFFFF;
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} else {
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*cycles = 0xFFFF - counter + 1;
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// Correction, depending on last parity bit sent
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sz = pbtTx[szTx -1];
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parity = (sz >> 7) ^ ((sz >> 6) & 1) ^ ((sz >> 5) & 1) ^ ((sz >> 4) & 1) ^ ((sz >> 3) & 1) ^ ((sz >> 2) & 1) ^ ((sz >> 1) & 1) ^ (sz & 1);
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parity = parity ? 0:1;
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if (parity) {
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*cycles += CHIP_DATA(pnd)->timer_correction_yy;
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} else {
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*cycles += CHIP_DATA(pnd)->timer_correction_zy;
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}
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}
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return true;
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}
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#define SAK_ISO14443_4_COMPLIANT 0x20
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bool
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pn53x_target_init (nfc_device_t * pnd, nfc_target_t * pnt, byte_t * pbtRx, size_t * pszRx)
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@ -39,6 +39,11 @@
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// 11 : ISO/IEC 14443B
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# define SYMBOL_TX_FRAMING 0x03
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# define REG_CONTROL_SWITCH_RNG 0x6106
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# define SYMBOL_CURLIMOFF 0x08 /* When set to 1, the 100 mA current limitations is desactivated. */
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# define SYMBOL_SIC_SWITCH_EN 0x10 /* When set to logic 1, the SVDD switch is enabled and the SVDD output delivers power to secure IC and internal pads (SIGIN, SIGOUT and P34). */
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# define SYMBOL_RANDOM_DATAREADY 0x02 /* When set to logic 1, a new random number is available. */
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# define REG_CIU_RX_MODE 0x6303
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# define SYMBOL_RX_CRC_ENABLE 0x80
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# define SYMBOL_RX_NO_ERROR 0x08
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@ -51,29 +56,50 @@
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# define SYMBOL_AUTO_WAKE_UP 0x20
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# define SYMBOL_INITIAL_RF_ON 0x04
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# define REG_CIU_TXSEL 0x6306
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# define REG_CIU_MANUAL_RCV 0x630D
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# define SYMBOL_PARITY_DISABLE 0x10
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# define REG_CIU_TMODE 0x631A
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# define SYMBOL_TAUTO 0x80
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# define SYMBOL_TPRESCALERHI 0x0F
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# define REG_CIU_TPRESCALER 0x631B
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# define SYMBOL_TPRESCALERLO 0xFF
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# define REG_CIU_TRELOADVALHI 0x631C
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# define REG_CIU_TRELOADVALLO 0x631D
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# define REG_CIU_TCOUNTERVALHI 0x631E
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# define REG_CIU_TCOUNTERVALLO 0x631F
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# define REG_CIU_COMMAND 0x6331
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# define SYMBOL_COMMAND 0x0F
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# define SYMBOL_COMMAND_TRANSCEIVE 0xC
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# define REG_CIU_STATUS2 0x6338
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# define SYMBOL_MF_CRYPTO1_ON 0x08
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# define REG_CIU_FIFODATA 0x6339
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# define REG_CIU_FIFOLEVEL 0x633A
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# define SYMBOL_FLUSH_BUFFER 0x80
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# define SYMBOL_FIFO_LEVEL 0x7F
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# define REG_CIU_CONTROL 0x633C
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# define SYMBOL_INITIATOR 0x10
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# define SYMBOL_RX_LAST_BITS 0x07
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# define REG_CIU_BIT_FRAMING 0x633D
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# define SYMBOL_START_SEND 0x80
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# define SYMBOL_RX_ALIGN 0x70
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# define SYMBOL_TX_LAST_BITS 0x07
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# define REG_CONTROL_SWITCH_RNG 0x6106
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# define SYMBOL_CURLIMOFF 0x08 /* When set to 1, the 100 mA current limitations is desactivated. */
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# define SYMBOL_SIC_SWITCH_EN 0x10 /* When set to logic 1, the SVDD switch is enabled and the SVDD output delivers power to secure IC and internal pads (SIGIN, SIGOUT and P34). */
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# define SYMBOL_RANDOM_DATAREADY 0x02 /* When set to logic 1, a new random number is available. */
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# define REG_CIU_TXSEL 0x6306
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# define SFR_P3CFGB 0xFFFD
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# define SFR_P3 0xFFB0
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// PN53X Support Byte flags
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#define SUPPORT_ISO14443A 0x01
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#define SUPPORT_ISO14443B 0x02
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@ -131,6 +157,10 @@ struct pn53x_data {
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uint8_t ui8Parameters;
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/** Last sent command */
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uint8_t ui8LastCommand;
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/** Interframe correction for commands ending with logic "1" */
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int16_t timer_correction_yy;
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/** Interframe correction for commands ending with logic "0" */
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int16_t timer_correction_zy;
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};
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#define CHIP_DATA(pnd) ((struct pn53x_data*)(pnd->chip_data))
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@ -254,6 +284,11 @@ bool pn53x_initiator_transceive_bits (nfc_device_t * pnd, const byte_t * pbtT
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byte_t * pbtRxPar);
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bool pn53x_initiator_transceive_bytes (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx,
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byte_t * pbtRx, size_t * pszRx);
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bool pn53x_initiator_transceive_bits_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits,
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const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits,
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byte_t * pbtRxPar, uint16_t * cycles);
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bool pn53x_initiator_transceive_bytes_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx,
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byte_t * pbtRx, size_t * pszRx, uint16_t * cycles);
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bool pn53x_initiator_deselect_target (nfc_device_t * pnd);
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// NFC device as Target functions
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@ -222,6 +222,16 @@ acr122_connect (const nfc_device_desc_t * pndd)
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CHIP_DATA (pnd)->state = NORMAL;
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CHIP_DATA (pnd)->io = &acr122_io;
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// Timer stops only after 5 bits are received => 5*128 cycles
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// When sent ...ZY (cmd ends with logical 0):
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// 50: empirical tuning on Touchatag
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// 46: empirical tuning on ACR122U
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CHIP_DATA (pnd)->timer_correction_zy = 50 - (5 * 128);
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// When sent ...YY (cmd ends with logical 1):
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// a ...ZY signal finishes 64us later than a ...YY signal
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CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
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pnd->driver = &acr122_driver;
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pn53x_init (pnd);
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@ -410,6 +420,8 @@ const struct nfc_driver_t acr122_driver = {
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.initiator_deselect_target = pn53x_initiator_deselect_target,
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.initiator_transceive_bytes = pn53x_initiator_transceive_bytes,
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.initiator_transceive_bits = pn53x_initiator_transceive_bits,
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.initiator_transceive_bytes_timed = pn53x_initiator_transceive_bytes_timed,
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.initiator_transceive_bits_timed = pn53x_initiator_transceive_bits_timed,
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.target_init = NULL,
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.target_send_bytes = NULL,
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@ -115,6 +115,14 @@ arygon_probe (nfc_device_desc_t pnddDevices[], size_t szDevices, size_t * pszDev
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CHIP_DATA (pnd)->type = PN532;
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CHIP_DATA (pnd)->state = NORMAL;
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CHIP_DATA (pnd)->io = &arygon_tama_io;
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// Timer stops only after 5 bits are received => 5*128 cycles
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// When sent ...ZY (cmd ends with logical 0):
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// TODO: calibration
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// 50: empirical tuning
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CHIP_DATA (pnd)->timer_correction_zy = 50 - (5 * 128);
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// When sent ...YY (cmd ends with logical 1):
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// a ...ZY signal finishes 64us later than a ...YY signal
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CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
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bool res = arygon_reset_tama (pnd);
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nfc_device_free (pnd);
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@ -439,6 +447,8 @@ const struct nfc_driver_t arygon_driver = {
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.initiator_deselect_target = pn53x_initiator_deselect_target,
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.initiator_transceive_bytes = pn53x_initiator_transceive_bytes,
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.initiator_transceive_bits = pn53x_initiator_transceive_bits,
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.initiator_transceive_bytes_timed = pn53x_initiator_transceive_bytes_timed,
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.initiator_transceive_bits_timed = pn53x_initiator_transceive_bits_timed,
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.target_init = pn53x_target_init,
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.target_send_bytes = pn53x_target_send_bytes,
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@ -96,6 +96,14 @@ pn532_uart_probe (nfc_device_desc_t pnddDevices[], size_t szDevices, size_t * ps
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CHIP_DATA (pnd)->type = PN532;
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CHIP_DATA (pnd)->state = SLEEP;
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CHIP_DATA (pnd)->io = &pn532_uart_io;
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// Timer stops only after 5 bits are received => 5*128 cycles
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// When sent ...ZY (cmd ends with logical 0):
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// TODO: calibration
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// 50: empirical tuning
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CHIP_DATA (pnd)->timer_correction_zy = 50 - (5 * 128);
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// When sent ...YY (cmd ends with logical 1):
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// a ...ZY signal finishes 64us later than a ...YY signal
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CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
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// Check communication using "Diagnose" command, with "Communication test" (0x00)
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bool res = pn53x_check_communication (pnd);
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@ -370,6 +378,8 @@ const struct nfc_driver_t pn532_uart_driver = {
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.initiator_deselect_target = pn53x_initiator_deselect_target,
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.initiator_transceive_bytes = pn53x_initiator_transceive_bytes,
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.initiator_transceive_bits = pn53x_initiator_transceive_bits,
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.initiator_transceive_bytes_timed = pn53x_initiator_transceive_bytes_timed,
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.initiator_transceive_bits_timed = pn53x_initiator_transceive_bits_timed,
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.target_init = pn53x_target_init,
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.target_send_bytes = pn53x_target_send_bytes,
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@ -54,6 +54,7 @@ Thanks to d18c7db and Okko for example code
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typedef enum {
|
||||
UNKNOWN,
|
||||
NXP_PN531,
|
||||
SONY_PN531,
|
||||
NXP_PN533,
|
||||
ASK_LOGO,
|
||||
SCM_SCL3711
|
||||
|
|
@ -105,7 +106,7 @@ const struct pn53x_usb_supported_device pn53x_usb_supported_devices[] = {
|
|||
{ 0x04CC, 0x0531, NXP_PN531, "Philips / PN531" },
|
||||
{ 0x04CC, 0x2533, NXP_PN533, "NXP / PN533" },
|
||||
{ 0x04E6, 0x5591, SCM_SCL3711, "SCM Micro / SCL3711-NFC&RW" },
|
||||
{ 0x054c, 0x0193, NXP_PN531, "Sony / PN531" },
|
||||
{ 0x054c, 0x0193, SONY_PN531, "Sony / PN531" },
|
||||
{ 0x1FD3, 0x0608, ASK_LOGO, "ASK / LoGO" }
|
||||
};
|
||||
|
||||
|
|
@ -285,6 +286,33 @@ pn53x_usb_connect (const nfc_device_desc_t *pndd)
|
|||
|
||||
CHIP_DATA (pnd)->state = NORMAL;
|
||||
CHIP_DATA (pnd)->io = &pn53x_usb_io;
|
||||
|
||||
switch (DRIVER_DATA (pnd)->model) {
|
||||
case ASK_LOGO:
|
||||
// Timer stops only after 5 bits are received => 5*128 cycles
|
||||
// When sent ...ZY (cmd ends with logical 0):
|
||||
// 50: empirical tuning
|
||||
CHIP_DATA (pnd)->timer_correction_zy = 50 - (5 * 128);
|
||||
// When sent ...YY (cmd ends with logical 1):
|
||||
// a ...ZY signal finishes 64us later than a ...YY signal
|
||||
CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
|
||||
break;
|
||||
case SCM_SCL3711:
|
||||
case NXP_PN533:
|
||||
CHIP_DATA (pnd)->timer_correction_zy = 46 - (5 * 128);
|
||||
CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
|
||||
break;
|
||||
case NXP_PN531:
|
||||
CHIP_DATA (pnd)->timer_correction_zy = 50 - (2 * 128);
|
||||
CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
|
||||
break;
|
||||
case SONY_PN531:
|
||||
CHIP_DATA (pnd)->timer_correction_zy = 54 - (2 * 128);
|
||||
CHIP_DATA (pnd)->timer_correction_yy = CHIP_DATA (pnd)->timer_correction_zy + 64;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
pnd->driver = &pn53x_usb_driver;
|
||||
|
||||
// HACK1: Send first an ACK as Abort command, to reset chip before talking to it:
|
||||
|
|
@ -591,6 +619,8 @@ const struct nfc_driver_t pn53x_usb_driver = {
|
|||
.initiator_deselect_target = pn53x_initiator_deselect_target,
|
||||
.initiator_transceive_bytes = pn53x_initiator_transceive_bytes,
|
||||
.initiator_transceive_bits = pn53x_initiator_transceive_bits,
|
||||
.initiator_transceive_bytes_timed = pn53x_initiator_transceive_bytes_timed,
|
||||
.initiator_transceive_bits_timed = pn53x_initiator_transceive_bits_timed,
|
||||
|
||||
.target_init = pn53x_target_init,
|
||||
.target_send_bytes = pn53x_target_send_bytes,
|
||||
|
|
|
|||
|
|
@ -114,6 +114,8 @@ struct nfc_driver_t {
|
|||
bool (*initiator_deselect_target) (nfc_device_t * pnd);
|
||||
bool (*initiator_transceive_bytes) (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx, size_t * pszRx);
|
||||
bool (*initiator_transceive_bits) (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits, const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar);
|
||||
bool (*initiator_transceive_bytes_timed) (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx, size_t * pszRx, uint16_t * cycles);
|
||||
bool (*initiator_transceive_bits_timed) (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits, const byte_t * pbtTxPar, byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar, uint16_t * cycles);
|
||||
|
||||
bool (*target_init) (nfc_device_t * pnd, nfc_target_t * pnt, byte_t * pbtRx, size_t * pszRx);
|
||||
bool (*target_send_bytes) (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx);
|
||||
|
|
|
|||
40
libnfc/nfc.c
40
libnfc/nfc.c
|
|
@ -535,6 +535,46 @@ nfc_initiator_transceive_bits (nfc_device_t * pnd, const byte_t * pbtTx, const s
|
|||
HAL (initiator_transceive_bits, pnd, pbtTx, szTxBits, pbtTxPar, pbtRx, pszRxBits, pbtRxPar);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to target then retrieve data from target
|
||||
* @return Returns \c true if action was successfully performed; otherwise returns \c false.
|
||||
*
|
||||
* This function is similar to nfc_initiator_transceive_bytes() with the following differences:
|
||||
* - A precise cycles counter will indicate the number of cycles between emission & reception of frames.
|
||||
* - It only supports mode with \a NDO_EASY_FRAMING option disabled and CRC must be handled manually.
|
||||
* - Overall communication with the host is heavier and slower.
|
||||
*
|
||||
* @warning The configuration option \a NDO_EASY_FRAMING must be set to \c false.
|
||||
* @warning The configuration option \a NDO_HANDLE_CRC must be set to \c false.
|
||||
* @warning The configuration option \a NDO_HANDLE_PARITY must be set to \c true (the default value).
|
||||
*/
|
||||
bool
|
||||
nfc_initiator_transceive_bytes_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTx, byte_t * pbtRx,
|
||||
size_t * pszRx, uint16_t * cycles)
|
||||
{
|
||||
HAL (initiator_transceive_bytes_timed, pnd, pbtTx, szTx, pbtRx, pszRx, cycles)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transceive raw bit-frames to a target
|
||||
* @return Returns \c true if action was successfully performed; otherwise returns \c false.
|
||||
*
|
||||
* This function is similar to nfc_initiator_transceive_bits() with the following differences:
|
||||
* - A precise cycles counter will indicate the number of cycles between emission & reception of frames.
|
||||
* - It only supports mode with \a NDO_EASY_FRAMING option disabled and CRC must be handled manually.
|
||||
* - Overall communication with the host is heavier and slower.
|
||||
*
|
||||
* @warning The configuration option \a NDO_EASY_FRAMING must be set to \c false.
|
||||
* @warning The configuration option \a NDO_HANDLE_CRC must be set to \c false.
|
||||
* @warning The configuration option \a NDO_HANDLE_PARITY must be set to \c true (the default value).
|
||||
*/
|
||||
bool
|
||||
nfc_initiator_transceive_bits_timed (nfc_device_t * pnd, const byte_t * pbtTx, const size_t szTxBits, const byte_t * pbtTxPar,
|
||||
byte_t * pbtRx, size_t * pszRxBits, byte_t * pbtRxPar, uint16_t * cycles)
|
||||
{
|
||||
HAL (initiator_transceive_bits_timed, pnd, pbtTx, szTxBits, pbtTxPar, pbtRx, pszRxBits, pbtRxPar, cycles);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize NFC device as an emulated tag
|
||||
* @return Returns \c true if action was successfully performed; otherwise returns \c false.
|
||||
|
|
|
|||
Loading…
Reference in a new issue